Annealing process to stabilize PECVD silicon nitride for application as the gate dielectric in MOS devices
US4962065A · kind A · utility
32Cited by
9References
15Claims
0Family size
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Key dates
| Filing date | Feb 9, 1990 |
| Grant date | Oct 9, 1990 |
| Priority date | — |
| Expiry date | Feb 9, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/91
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process by which thin films of silicon nitride are deposited on silicon substrates by plasma enhanced chemical vapor deposition techniques is stabilized by post-deposition rapid thermal annealing at temperatures ranging from about 600.degree. C. to about 700.degree. C. and at times ranging from about 3 seconds to about 30 seconds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.