Flexible, programmable cell array interconnected by a programmable switch matrix
US4963768A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 1988 |
| Grant date | Oct 16, 1990 |
| Priority date | — |
| Expiry date | Sep 12, 2008 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17744
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high density segmented programmable array logic device utilizes a switch interconnection matrix to couple an array of programmable logic cells. Each programmable logic cell includes programmable input logic macrocells, programmable feedback logic macrocells, programmable output logic macrocells, buried state logic macrocells and an assembly of programmable AND gates and OR gates. Each input macrocell, output macrocell and buried state macrocell has means for generating either a registered/latched output signal or a combinatorial output signal in response to an input signal to the cell. The various switches are used to couple signals to or from the assembly of programmable AND gates and OR gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.