Lateral insulated gate bipolar transistors with improved latch-up immunity
US4963951A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1985 |
| Grant date | Oct 16, 1990 |
| Priority date | — |
| Expiry date | Nov 29, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
The present invention relates generally to insulated gate transistors and more particularly, to laterally implemented insulated gate transistors having improved current capacity and improved immunity to latch-up. Specifically, it has been found that a lateral insulated gate transistor fabricated on a heavily doped substrate such as a p+ substrate exhibits improved current density. Further, the inclusion of an additional heavily doped region such as a P+ region proximate the base region contributes to improved latch-up immunity within the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.