Method for manufacturing poly-crystal sillicon having high resistance
US4965214A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 1988 |
| Grant date | Oct 23, 1990 |
| Priority date | — |
| Expiry date | Jul 27, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/934
Abstract
Method for manufacturing polycrystalline silicon having high resistance, having a first step for depositing a polycrystalline silicon layer for a resistor area over a silicon semiconductor substrate; a second step for growing a first thermal oxide layer having a first specified depth over the polycrystalline silicon layer, ion-implanting with the nitrogen thereon, and growing a second thermal oxide layer having a second specified depth on the ion-implanted layer; a third step for forming a resistor pattern of the polycrystalline silicon with a photo etching method; and a fourth step for ion-implanting impurities in order to decrease the resistance of the polycrystalline silicon as contact regions to be used in resistance contacts with a fixed semiconductor region on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.