Dong-Joo Bae
13Patents
7h-index
12Co-inventors
63Inventor score
Filing activity: Jul 27, 1988 → Sep 26, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5135883A | Process for producing a stacked capacitor of a dram cell | Electricity | 48 | Expired |
| US5095346A | Stacked-capacitor for a DRAM cell | Electricity | 28 | Expired |
| US5256585A | Process for fabricating a gate-drain overlapped semiconductor | Electricity | 24 | Expired |
| US4965214A | Method for manufacturing poly-crystal sillicon having high resistance | Emerging Cross-Sectional Technologies | 16 | Expired |
| US5236859A | Method of making stacked-capacitor for a dram cell same | Electricity | 13 | Expired |
| US6426277B1 | Methods and a device for heat treating a semiconductor wafer having different kinds of impurities | Electricity | 13 | Expired |
| US5187548A | Stacked capacitor of a DRAM cell with fin-shaped electrodes having supporting layers | Electricity | 11 | Expired |
| US5320980A | Interconnection structure in semiconductor device and the method thereof | Emerging Cross-Sectional Technologies | 5 | Expired |
| US5285110A | Interconnection structure in semiconductor device | Emerging Cross-Sectional Technologies | 4 | Expired |
| US8871587B2 | Complementary stress memorization technique layer method | Electricity | 3 | Active |
| US5141884A | Isolation method of semiconductor device | Emerging Cross-Sectional Technologies | 2 | Expired |
| US8962419B2 | Complementary stress memorization technique layer method | Electricity | 2 | Active |
| US7927987B2 | Method of reducing channeling of ion implants using a sacrificial scattering layer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.