Evaluation method for semiconductor device
US4968932A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1988 |
| Grant date | Nov 6, 1990 |
| Priority date | — |
| Expiry date | Sep 30, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/311
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An evaluation method for a semiconductor device includes the steps of applying a reverse bias voltage between an N-type substrate formed in a surface of the semiconductor device and a P-type region formed in a surface of the N-type substrate to form a depletion layer along the junction therebetween, scanning the surface of the semiconductor device is one direction with a light beam to cause an optical beam induced current to be flow across the junction, and measuring the OBIC intensity profile on a scanning line extending across the depletion layer in the surfaces of the N-type substrate and P-type region. In the method, the light beam has a wavelength whose penetration length is smaller than the depth or thickness of the P-type region, the OBIC intensity profile is integrated over a range corresponding to the depletion layer, and the integrated value is normalized by the reverse bias voltage to determine the surface potential distribution of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.