High-density electronic modules - process and product
US4983533A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1987 |
| Grant date | Jan 8, 1991 |
| Priority date | — |
| Expiry date | Oct 28, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high-density electronic module is disclosed, which is suitable for use as a DRAM, SRAM, ROM, logic unit, arithmetic unit, etc. It is formed by stacking integrated-circuit chips, each of which carries integrated circuitry. The chips are glued together, with their leads along one edge, so that all the leads of the stack are exposed on an access plane. Where heat extraction augmentation is needed, additional interleaved layers are included in the stacks which have high thermal conductivity, and are electrical insulators. These interleaved layers may carry rerouting electrical conductors. Bonding bumps are formed at appropriate points on the access plane. A stack-supporting substrate is provided with suitable circuitry and bonding bumps on its face. A layer of insulation is applied to either the access plane or stack-supporting substrate, preferably the latter. The bonding bumps on the insulation-carrying surface are formed after the insulation has been applied. The substrate face is placed on the access plane of the stack, their bonding bumps are microscopically aligned, and then bonded together under heat and/or pressure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.