Tapered trench structure and process
US4984039A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 11, 1990 |
| Grant date | Jan 8, 1991 |
| Priority date | — |
| Expiry date | Jun 11, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30655
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A plasma dry etch process for etching deep trenches in single crystal silicon material with controlled wall profile, for trench capacitors or trench isolation structures. HCl is used as an etchant under RIE conditions with a SiO.sub.2 hard mask. The SiO.sub.2 hard mask is forward sputtered during the course of the Si etch so as to slowly deposit SiO.sub.x (x<2) on the sidewalls of the silicon trench. Since the sidewall deposit shadows etching at the bottom of the trench near the sidewall, the effect of this gradual buildup is to produce a positively sloped trench sidewall without "grooving" the bottom of the trench, and without linewidth loss. This process avoids the prior art problems of mask undercut, which generates voids during subsequent refill processing, and grooving at the bottom of the trench, which is exceedingly deleterious to thin capacitor dielectric integrity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.