Fermi threshold field effect transistor
US4984043A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 22, 1989 |
| Grant date | Jan 8, 1991 |
| Priority date | — |
| Expiry date | Jun 22, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/662
Abstract
A field effect transistor (FET) operates in the enhancement mode without requiring inversion by setting the device's threshold voltage to twice the Fermi potential of the semiconductor material. The FET, referred to as a Fermi Threshold FET or Fermi-FET, has a threshold voltage which is independent of oxide thickness, channel length, drain voltage and substrate doping. The vertical electric field in the channel becomes zero, thereby maximizing carrier mobility, and minimizing hot electron effects. A high speed device, substantially independent of device dimensions is thereby provided, which may be manufactured using relaxed groundrules, to provide low cost, high yield devices. Temperature dependence of threshold voltage may also be eliminated by providing a semiconductor gate contact which neutralizes the effect of substrate contact potential. Source and drain subdiffusion regions may be provided to simultaneously maximize the punch-through and impact ionization voltages of the devices, so that short channel devices do not require scaled-down power supply voltages. Multi gate devices may be provided. An accelerator gate, adjacent the drain, may further improve performance. The Ferm…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.