Power field effect devices having low gate sheet resistance and low ohmic contact resistance
US4985740A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1989 |
| Grant date | Jan 15, 1991 |
| Priority date | — |
| Expiry date | Jun 1, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-cellular power field effect semiconductor device includes a tungsten silicide/polysilicon/oxide gate electrode stack with low sheet resistance. Preferably, a layer of tungsten is also disposed in intimate contact with the source region of the device. This tunsten layer is self-aligned with respect to the aperture in the gate electrode through which the source region is diffused. The presence of this tungsten layer greatly reduces the resulting ohmic contact resistance to the region. If desired, a tunsten layer can also be disposed in contact with the drain region of the device, again, to lower ohmic contact resistance. The device has substantially improved operating characteristics. Novel processes for producing the device are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.