Substrate structure for composite semiconductor device
US4985745A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 1989 |
| Grant date | Jan 15, 1991 |
| Priority date | — |
| Expiry date | Jan 3, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76286
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The main surface of a first semiconductor substrate is bonded to the main surface of a second semiconductor substrate with an insulation film interposed therebetween to form a composite substrate. The first semiconductor substrate and insulation film are selectively etched to form an etched portion which reaches at least the second semiconductor substrate. An impurity layer with an impurity concentration different from that of the first semiconductor substrate is formed on or in the surface area exposed to the etched portion of the first and second semiconductor substrates. An epitaxial layer having an impurity concentration different from that of the impurity layer is formed in the etched portion. The first semiconductor substrate, impurity layer and epitaxial layer are planarized. The first semiconductor substrate, impurity layer and epitaxial layer are etched to make a pattern of the impurity layer on the surface of the composite substrate and the composite semiconductor substrate is aligned for formation of elements based on the pattern. The elements are formed in the composite substrate thus aligned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.