Vertical thermal processor for semiconductor wafers
US5000682A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 1990 |
| Grant date | Mar 19, 1991 |
| Priority date | — |
| Expiry date | Jan 22, 2010 |
Classification
- Technology area (CPC F)Mechanical Engineering; Lighting; Heating
- CPC primaryF27D5/0037
- WIPO fieldThermal processes and apparatus
- WIPO sectorMechanical engineering
Abstract
Semiconductor wafers within a supporting vertical wafer tower are positioned within a vertical process chamber through a lower gate valve fixed to a supporting framework. The gate valve is sealed to a similar gate valve at the upper end of a movable load lock on the framework, within which the wafers are subjected to pre-treatment and post-treatment processes. Two load locks are alternately used in conjunction with the process chamber and a wafer loading station on the framework. In addition, a cleaning element is movably mounted on the framework for periodically maintaining the interior surfaces of the process tube within the process chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.