Method and apparatus for modifying micro-instructions using a macro-instruction pipeline
US5005118A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 10, 1987 |
| Grant date | Apr 2, 1991 |
| Priority date | — |
| Expiry date | Apr 10, 2007 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and mechanism operate for shortening the execution time of certain macro-instructions by looking at both a present macro-instruction and a next macro-instruction. The invention includes two, interrelated aspects for accomplishing this. First, a first operation of a next macro-instruction is performed concurrently with a last operation of a current macro-instruction. Second, the next macro-instruction is decoded to determine the minimum number of clock cycles it requires. If this minimum number is below a specified number, the micro operations of the present instruction are modified to perform appropriate set-up operations for the next macro-instruction to enable it to be completed in the computed minimum number of clock cycles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.