Daniel E. Lenoski
33Patents
19h-index
30Co-inventors
81Inventor score
Filing activity: Mar 27, 1987 → Jan 6, 2011
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6049476A | High memory capacity DIMM with data and state memory | Physics | 126 | Expired |
| US6990063B1 | Distributing fault indications and maintaining and using a data structure indicating faults to route traffic in a packet switching system | Electricity | 90 | Expired |
| US6735173B1 | Method and apparatus for accumulating and distributing data items within a packet switching system | Electricity | 83 | Expired |
| US6816492B1 | Resequencing packets at output ports without errors using packet timestamps and timestamp floors | Electricity | 82 | Expired |
| US5727150A | Apparatus and method for page migration in a non-uniform memory access (NUMA) system | Physics | 79 | Expired |
| US5790447A | High-memory capacity DIMM with data and state memory | Physics | 73 | Expired |
| US5686730A | Dimm pair with data memory and state memory | Physics | 43 | Expired |
| US5309561A | Synchronous processor unit with interconnected, separately clocked processor sections which are automatically synchronized for data transfer operations | Physics | 36 | Expired |
| US6182195A | System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer | Physics | 32 | Expired |
| US5669008A | Hierarchical fat hypercube architecture for parallel processing systems | Physics | 30 | Expired |
| US5005118A | Method and apparatus for modifying micro-instructions using a macro-instruction pipeline | Physics | 30 | Expired |
| US6826186B1 | Method and apparatus for distributing packets across multiple paths leading to a destination | Electricity | 30 | Expired |
| US5787476A | System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer | Physics | 30 | Expired |
| US5822381A | Distributed global clock system | Electricity | 29 | Expired |
| US5768529A | System and method for the synchronous transmission of data in a communication network utilizing a source clock signal to latch serial data into first registers and a handshake signal to latch parallel data into second registers | Physics | 26 | Expired |
| US5634110A | Cache coherency using flexible directory bit vectors | Physics | 25 | Expired |
| US6747972B1 | Method and apparatus for reducing the required size of sequence numbers used in resequencing packets | Electricity | 24 | Expired |
| US5132927A | System for cache space allocation using selective addressing | Physics | 20 | Expired |
| US4843608A | Cross-coupled checking circuit | Physics | 19 | Expired |
| US4780874A | Diagnostic apparatus for a data processing system | Physics | 18 | Expired |
| US4899307A | Stack with unary encoded stack pointer | Physics | 18 | Expired |
| US5185870A | System to determine if modification of first macroinstruction to execute in fewer clock cycles | Physics | 15 | Expired |
| US5032983A | Entry point mapping and skipping method and apparatus | Physics | 15 | Expired |
| US8117369B2 | Input-output module for operation in memory module socket and method for extending a memory interface for input-output operations | Physics | 14 | Active |
| US5991895A | System and method for multiprocessor partitioning to support high availability | Physics | 12 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.