On-chip high voltage generator and regulator in an integrated circuit
US5014097A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 24, 1987 |
| Grant date | May 7, 1991 |
| Priority date | — |
| Expiry date | Dec 24, 2007 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An EEPROM constructed in accordance with our invention includes a voltage multiplier for generating an erase voltage and a voltage regulator circuit for controlling the magnitude of the erase voltage. The voltage regulator circuit includes a capacitive voltage divider for providing a first voltage proportional to the erase voltage, a reference voltage lead for providing a reference voltage and a control circuit for controlling the voltage multipler circuit so that if the first voltage is less than the reference voltage, the voltage multiplier circuit will increase the erase voltage, but if the first voltage is greater than the reference voltage, the voltage multiplier will not continue to increase the erase voltage. The voltage multiplier includes novel capacitors and transistors constructed using standard EEPROM processing to withstand high voltages without breaking down.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.