Method for storing into non-exclusive cache lines in multiprocessor systems
US5016168A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 23, 1988 |
| Grant date | May 14, 1991 |
| Priority date | — |
| Expiry date | Dec 23, 2008 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0828
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for storing into a non-EX cache line in a multiprocessor system. Upon a store into a non-EX line the instruction execution and the processing of subsequent instructions will continue. The results of the current instruction, however, and any subsequent instruction whose decode and execution depends upon the result of the current instruction or that requires operand fetches, will not be released until the processing of the current instruction is resolved. The request to store into the non-EX line is simultaneously sent to the SCE to obtain the EX state for the line. The SCE serializes storage requests. When a request for EX state is processed, certain XI actions (e.g. XI-invalidates) may be invoked. Any instruction using fetched data XI-invalidated before the resolution of a preceding store at the same CP is considered likely to be invalid, and redone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.