Semiconductor memory
US5018101A · kind A · utility
4Cited by
3References
6Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Aug 31, 1990 |
| Grant date | May 21, 1991 |
| Priority date | — |
| Expiry date | Aug 31, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory wherein an operating mode is selectively set by effecting bonding with respect to predetermined pads provided on a common semiconductor substrate in a predetermined combination or by cutting off predetermined fuse means provided on the common semiconductor substrate in a predetermined combination and a bit pattern is selectively set by changing a part of a photomask applied to the common semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.