Bipolar SRAM having word lines as vertically stacked pairs of conductive lines parallelly formed with holding current lines
US5029127A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 1990 |
| Grant date | Jul 2, 1991 |
| Priority date | — |
| Expiry date | May 15, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/415
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is implemented memory cells and corresponding signal lines associated therewith in bipolar type static random access memories employing wirings of multi-layer construction for transmitting a common signal therethrough such as with respect to the individual word lines. The word lines implemented are formed from at least a pair of stacked conductive layers and which layers have interposed therebetween an insulating film. The pair of layers form a pair of wiring lines wherein together they form a work line and wherein the wiring lines are, furthermore, interconnected at predetermined intervals along the lengths thereof. This leads to the ability to decrease the chip size of semiconductor integrated circuits noting that a decrease in the voltage drop of a signal line results, and to prevent electromigration in the signal (wiring) lines. There is, furthermore, implemented a current line formed from a conductor layer which is extended along the direction of the word lines over a region, together with the word lines, where the memory cells are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.