Reset circuit for redundant memory using CAM cells
US5031142A · kind A · utility
29Cited by
9References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 10, 1989 |
| Grant date | Jul 9, 1991 |
| Priority date | — |
| Expiry date | Feb 10, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/785
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Modified CAMs are used to generate a reset signal to other redundant CAMs which provide decoding for accessing redundant memory. Because the redundant CAMs use a single UPROM, half-latch circuit, the redundant CAMs are capable of latching to the wrong logic state. Whenever signal conditions which can cause improper latch-up are present, at least one of the modified CAMs are affected due to their sensitivity. Then, the modified CAMs will generate a reset signal until the improper latch-up condition is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.