Compression bonded semiconductor device having a plurality of stacked hermetically sealed circuit assemblies
US5034803A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 1988 |
| Grant date | Jul 23, 1991 |
| Priority date | — |
| Expiry date | Aug 1, 2008 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/909
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hermetically sealed circuit assembly having circuit elements to be compression bonded and a stack containing at least one hermetically sealed circuit assembly having circuit elements which are compression bonded is disclosed. Uniform thickness of individual hermetically sealed circuit assemblies measured across columns is insured by positioning deformable spacers in the columns containing the circuit elements to be compression bonded, and deforming the deformable spacers so that a surface of each of the deformed spacers lies within a single plane. Thereafter a compressive force is applied to a stack or one or more circuits through the columns which contain the circuit elements to be compression bonded. The individual hermetically sealed circuit assemblies have circular corrugations in a flat surface and circular corrugations in a lid which are disposed within the columns containing the individual circuit elements to be compression bonded to permit freedom of motion in all directions of the individual circuit elements to be compression bonded without applying torsional or other loads to any other circuit elements to be compression bonded. Furthermore, all circuit buses contain one…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.