Method of fabricating a thin film polysilicon thin film transistor or resistor
US5037766A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 17, 1990 |
| Grant date | Aug 6, 1991 |
| Priority date | — |
| Expiry date | Jan 17, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/98
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a double layered polisilicon film with oxygen diffusion for scaled down polysilicon thin film transistor/resistor. The double layered polysilicon film structure includes: a first heavily doped polysilicon layer, produced by Low Pressure Chemical Vapor Deposition (LPCVD) system at about 610 degrees Centigrade, is used as electrodes of resistor or source/drain electrodes of a transistor, and a second layer of polysilicon, deposited by LPCVD at the temperature about 560 degrees Centigrade, is used as a resistor layer or a channel layer of a transistor. Oxygen treatment is applied at low temperature after the first polysilicon layer is defined. The oxygen present at polysilicon grain boundary blocks the dopant diffusing from the first electrode polysilicon to the second polysilicon which is used as resistor region or a channel region of a transistor. Thus, the resistor can maintain high resistivity and the transistor can maintain low threshold voltage even when they are scaled down.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.