Output buffer preconditioning circuit
US5045722A · kind A · utility
11Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1989 |
| Grant date | Sep 3, 1991 |
| Priority date | — |
| Expiry date | Nov 14, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A preconditioning circuit for use with an output buffer. The invention includes circuitry for detecting the output level of the buffer and for increasing the output level of the buffer when the output thereof is below a predetermined level or decreasing the output level of the buffer when the output thereof is above a predetermined level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.