Semiconductive arrangement having dissimilar, laterally spaced layer structures, and process for fabricating the same
US5049522A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 1990 |
| Grant date | Sep 17, 1991 |
| Priority date | — |
| Expiry date | Feb 9, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/152
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A depression is formed by mesa etching or the like in the surface of an insulative substrate. A first semiconductive layer structure such as a PNP layer structure is formed on the surface including the depression. An electrically insulative isolation layer is formed on the first layer structure, and then a second layer structure such as an NPN layer structure is formed on the isolation layer. The area over the depression is then masked, and the second layer structure and isolation layer are etched away from the first layer structure over areas of the surface external of the depression. Where the thicknesses of the first and second layer structures are equal, and the depth of the depression is equal to the combined thicknesses of the first layer structure and the isolation layer, the second layer structure laterally external of the depression will be coplanar with the first layer structure over the depression. Dissimilar microelectronic devices such as complementary heterojunction bipolar transistors may be formed in the exposed surfaces of the first and second layer structures respectively by common and simultaneous processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.