Measuring integrity of semiconductor multi-layer metal structures
US5049811A · kind A · utility
24Cited by
8References
12Claims
0Family size
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Key dates
| Filing date | Jul 2, 1990 |
| Grant date | Sep 17, 1991 |
| Priority date | — |
| Expiry date | Jul 2, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2831
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A fast, nondestructive, and low cost method for measuring the integrity of semiconductor multi-layer conducting structures uses a voltage spectral density technique. The method compares the magnitude and frequency of generally non-periodic low frequency voltages induced by direct current flow in test structures to the same parameters of a defect free structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.