Semiconductor device
US5055905A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 19, 1990 |
| Grant date | Oct 8, 1991 |
| Priority date | — |
| Expiry date | Oct 19, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/66
Abstract
A semiconductor device with a capacitive element of an MIS structure comprising an electrode lead segment and an MIS segment in which an electrode is formed through a dielectric layer on an impurity region over to an aperture in a field insulator film. A high-concentration impurity region which connects the impurity region of the MIS segment to the electrode lead region of the electrode lead segment is formed only in the junction between the impurity region and the electrode lead region. The parasitic capacitance between the capacitive element and the semiconductor substrate is reduced without increasing the parasitic resistance so as to consequently achieve high precision in forming the capacitive element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.