Compensation of lithographic and etch proximity effects
US5057462A · kind A · utility
31Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1989 |
| Grant date | Oct 15, 1991 |
| Priority date | — |
| Expiry date | Sep 27, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/948
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In the manufacture of integrated-circuit devices, patterned features are made on a substrate by etching a deposited layer. The pattern comprises features which are closely spaced, as well as others which are more isolated. Etching is in approximate conformance with a lithographically defined resist pattern which in turn is in approximate conformance with a desired pattern. A processing parameter such as, e.g., resist layer thickness is chosen such that an etched pattern is obtained which approximates a desired pattern more closely than a lithographically defined resist pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.