Instruction storage method with a compressed format using a mask word
US5057837A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1990 |
| Grant date | Oct 15, 1991 |
| Priority date | — |
| Expiry date | Jan 30, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0875
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for storing an instruction word in a compacted form on a storage media, the instruction word having a plurality of instruction fields, features associating with each instruction word, a mask word having a length in bits at least equal to the number of instruction fields in the instruction word. Each instruction field is associated with a bit of the mask word and accordingly, using the mask word, only non-zero instruction fields need to be stored in memory. The instruction compaction method is advantageously used in a high speed cache miss engine for refilling portions of instruction cache after a cache miss occurs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.