Method and apparatus for testing passive substrates for integrated circuit mounting
US5059897A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1989 |
| Grant date | Oct 22, 1991 |
| Priority date | — |
| Expiry date | Dec 7, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/281
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method for testing the continuity of interconnecting nets on a substrate to be used in multi-chip technology is provided. The system includes coupling a test pad (15) to the net (12) to be tested. The test pad (15) is coupled through a diode (34) to a common node (32). The voltage of a first node (16) of the net (12) is sensed by a voltmeter (38) which is coupled to ground. A predetermined current signal is applied to each node (16, 18, 20, 22) in the net through the use of a probe (42). The voltage of the remaining nets (14) is sensed by a voltmeter (44). If an erroneous interconnection (31) is present between the net (12) to be tested and any other net (14) on the substrate, the voltage of the other net (14) will fluctuate. The voltmeter (38) will indicate if there is an electrical connection between the node (16) and the test pad (15) during testing. If an electrical path is established between each node in the net (12) and test pad (15), the continuity of the net (12) is established through the operation of Ohm's law.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.