Integrated bipolar and CMOS transistor with titanium nitride interconnections

US5065208A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Rajiv Shah · Rancho Palos Verdes, US
• Toan Tran · Rowlett, US

Key dates

• Filing date: Feb 20, 1990
• Grant date: Nov 12, 1991
• Expiry date: Feb 20, 2010

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0109

Abstract

A process is disclosed with integrated steps for fabricating bipolar and CMOS transistors. Mask, patterning and implanting steps are highly integrated to reduce the fabrication complexity. The integrated steps include a split level polysilicon step wherein PMOS and NMOS gate conductors and a bipolar emitter structure is formed. The polysilicon is heavily doped which forms MOS transistor gate electrodes, and another high impurity concentration area which is later diffused into an underlying bipolar base region. Small area, high performance transistors can be fabricated with laterally extending contact strips. Alignment of electrode metallization patterns is thus less critical.