Scannable register with delay test capability
US5068881A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1990 |
| Grant date | Nov 26, 1991 |
| Priority date | — |
| Expiry date | Aug 10, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A scan-register having first and second data input ports (SYS.sub.-- DATA, SCAN.sub.-- IN), a data output port, and inputs for at least first, second, third, and fourth control signals (SYS.sub.-- CLK, M.sub.-- LOAD, CLK.sub.-- B, CLK.sub.-- A). The scan-register comprises the following elements: first means (12A) having inputs coupled to the first and second data input ports for selectively storing data appearing on one of the said data input ports in accordance with the occurrence of a predefined combination of states of at least the first and second control signals; second menas (10A) having at least one input coupled to the second data input port for selectively storing data appearing on the second data input port in accordance with the occurrence of a predefined state of at least the third control signal; and third means (12B) having at least one input port coupled to an output of one of the first and second means, and further having an output coupled to the data output port, for selectively storing data stored in either the first or second means in accordance with the occurrence of a predefined state of at least the fourth control signal and providing the data stored therein …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.