Method for manufacturing a trench capacitor of a one-transistor memory cell in a semiconductor substrate with a self-aligned capacitor plate electrode

US5073515A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Siegfried Roehl · Sauerlach, DE
• Josef Mathuni · Munich, DE

Key dates

• Filing date: Aug 27, 1990
• Grant date: Dec 17, 1991
• Expiry date: Aug 27, 2010

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/37

Abstract

Method for manufacturing a trench capacitor of a one-transistor memory cell in a semiconductor substrate with a self-aligned cooperating capacitor electrode. In a one-transistor memory cell having a trench capacitor in a semiconductor substrate (1), a field oxide (3) that isolates different cells is exploited for a self-aligning process. After the formation of a first electrode and of a dielectrode (5) of the capacitor, a conductive layer (6) is applied surface-wide, the upper edge thereof being higher over the field oxide (3) than over the field-oxide-free locations of the substrate (1). The raised location is exposed in a re-etching process upon employment of a planarizing auxiliary layer (9), and a sub-layer (10, 10') is selectively applied thereon, either by local oxidation, selective or non-selective deposition. This sub-layer (10, 10') serves as a self-aligned mask for the structuring of the conductive layer (6) as a cooperating electrode of the trench capacitor.