Method of manufacturing integrated circuits having electronic components of two different types each having pairs of electrodes obtained from the same polycrystalline silicon layers and separated by different dielectric materials

US5075246A · kind A · utility

Assignee

• SGS-Thomson Microelectronics S.A. · IT

Inventors

• Danilo Re · Bernareggio, IT
• Alfonso Maurelli · Vimercate, IT

Key dates

• Filing date: Dec 13, 1990
• Grant date: Dec 24, 1991
• Expiry date: Dec 13, 2010

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/014

Abstract

A method of manufacturing integrated circuits includes steps: forming a first layer of polycrystalline silicon on areas of a semiconductor substrate previously covered with a dielectric material; forming a first insulating layer and a second thin layer of polycrystalline silicon acting as a shield; removing the second layer of polycrystalline silicon and the first insulating layer except from predetermined areas for containing a first type of electronic component; doping the exposed portion of the first layer of polycrystalline silicon; forming, by deposition, masking and removal, of a second insulating layer on the first layer of polycrystalline silicon in an area for containing a second type of electronic component; forming of a third layer of polycrystalline silicon; masking predetermined zones of this latter layer lying at least partially above the areas intended for the two types of electronic components, and removing the polycrystalline silicon external to these predetermined zones. The method continues with conventional steps and makes it possible to obtain, for instance, EPROM memory cells and capacitors using the same polycrystalline silicon depositing steps for forming th…