Manufacturing method for a power MISFET

US5087577A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventor

• Helmut Strack · Hersbruck, DE

Key dates

• Filing date: Jun 5, 1991
• Grant date: Feb 11, 1992
• Expiry date: Jun 5, 2011

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/126

Abstract

A manufacturing method for a low-voltage power MISFET which utilizes three maskes (photosteps) is provided. In the first step, a polysilicon layer is structured and a cell field and edge zones are manufactured. An oxide layer is then applied, this being opened in the second photostep above the cells and the edge zones and between the edge and the cells. A metal layer is then applied, this being interrupted between the cells and the edge zones with the third photostep. Field plates and a channel stopper are thus produced.