Method for forming a germanium layer and a heterojunction bipolar transistor
US5089428A · kind A · utility
15Cited by
4References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1989 |
| Grant date | Feb 18, 1992 |
| Priority date | — |
| Expiry date | Dec 27, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/059
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for preparing a germanium layer (22) adjacent to a germanium silicon layer (20). Initially, a P-germanium silicon layer (16) is deposited on to an N-germanium silicon layer (14). The continuous germanium layer (22) is formed by heating the layers (14 and 16) in a steam oxidation step to approximately 1000 degrees Centigrade to transform the P-germanium silicon layer (16) into the P-germanium layer (18) and a SiO.sub.2 layer (22). A method for forming a heterojunction bipolar transistor utilizing a P-germanium layer (50) is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.