Method of processing a semiconductor substrate including silicide bonding
US5098861A · kind A · utility
34Cited by
3References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 8, 1991 |
| Grant date | Mar 24, 1992 |
| Priority date | — |
| Expiry date | Jan 8, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/923
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for processing at least two semiconductor wafers for producing a partially processed semiconductor substrate which can be subsequently further processed utilizing conventional planar semiconductor processing techniques to achieve a complementary semiconductor structure in which a plurality of matched semiconductor elements can be formed. An embedded silicide layer in the bonded semiconductor substrate acts as a conduit for horizontally dispersing dopant during the diffusion process. The dopant subsequently up-diffuses into an adjacent silicon region forming generally uniform and shallow, buried layer regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.