Process for manufacturing a metal pin grid array package
US5098864A · kind A · utility
51Cited by
27References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 14, 1991 |
| Grant date | Mar 24, 1992 |
| Priority date | — |
| Expiry date | Jan 14, 2011 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal pin grid array package and a process for the assembly of the package is provided. The package includes a metal or metal alloy base component having an ordered array of holes. Terminal pins are electrically interconnected to a desired circuit and extend through the ordered array of holes. A dielectric polymer sealant bonds a cover component to both the circuit and to the base component. During package assembly, the polymer sealant flows into the holes comprising the ordered array of holes electrically isolating the terminal pins from the base component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.