Semiconductor integrated circuit device of master slice approach
US5101258A · kind A · utility
3Cited by
4References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 7, 1990 |
| Grant date | Mar 31, 1992 |
| Priority date | — |
| Expiry date | Feb 7, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/996
Abstract
In a semiconductor integrated circuit device of master slice approach according to this invention, regions on basic elements which are not used and isolation areas serve as wiring regions. Resistive elements are formed on the regions on the basic elements which are not used and the isolation areas. A high integration level can be obtained, circuit layout can be facilitated, and versatility of circuit design can be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.