High voltage bipolar transistor in BiCMOS
US5102811A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 13, 1990 |
| Grant date | Apr 7, 1992 |
| Priority date | — |
| Expiry date | Nov 13, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
The described embodiments of the present invention show a high voltage bipolar transistor integrated into a bipolar complementary metal oxide semiconductor integrated circuit. The high voltage transistor is fabricated using the available processing steps for fabricating other components in more standard BiCMOS processes. The collector of the transistor is formed using a buried N type region in a P substrate. A P well, rather than the conventional N well is formed above the buried N layer. The collector contact to the buried N layer is fabricated so as to surround the P well to provide a separate base region. A highly doped P type base region is formed with a P+ contact to this region. An N+ emitter is formed by out diffusion from a heavily doped polycrystalline silicon layer formed in contact with the base region. By providing the lightly doped P well as an interface between the collector and the base, the breakdown voltage of the collector/base junction is substantially raised and thus the breakdown voltage from the collector to the emitter is also raised. A transistor thus fabricated is appropriate for high voltage applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.