Method for creating self-aligned, non-patterned contact areas and stacked capacitors using the method
US5104822A · kind A · utility
Assignees
Inventor
Key dates
| Filing date | Jul 30, 1990 |
| Grant date | Apr 14, 1992 |
| Priority date | — |
| Expiry date | Jul 30, 2010 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
Abstract
In a multi-layered integrated memory circuit, a method for using sacrificial layers and insulating "sticks" is disclosed to provide a contact between two layers, where the contact does not short to an intervening layer. This invention provides this with minimal extra processing by using sacrificial layers with appropriate etch and etch stop properties. As these layers are etched, additional layers which alternate in the same conducting/insulating pattern are exposed. Each etch stops on either a conductive or insulative layer. A contact layer may then be deposited which connects the uppermost capacitor plate to the pass transistor of the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.