Programmable logic device including verify circuit for macro-cell
US5105388A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 1990 |
| Grant date | Apr 14, 1992 |
| Priority date | — |
| Expiry date | Dec 26, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17708
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device includes an input/output buffer, a logic array, switches for switching signal lines provided between the logic array and the input/output buffer and feedback lines between an input and an output of the logic array so as to alter the logic operation. Switching operations of the switches such as an open/close operation and a selection operation, are determined by the data stored in a plurality of non-volatile memory elements arranged in a matrix of rows and columns, the non-volatile memory elements being respectively associated with the switches. The contents of the memory elements are read out and stored in registers. The data contents of the non-volatile memory elements as thus stored in the registers are applied to control terminals of the switches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.