Nonvolatile content-addressable memory and operating method therefor
US5111427A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 1989 |
| Grant date | May 5, 1992 |
| Priority date | — |
| Expiry date | Feb 14, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Each of memory cells in a nonvolatile content-addressable memory (CAM) comprises a first memory transistor connected to a first storage node, a second memory transistor connected to a second storage node, and a memory capacitor connected between said first and second storage nodes. The first storage node is connected to a first bit line through an MOS transistor, and the second storage node is connected to a second bit line through the MOS transistor. In addition, each of the memory cells has a function of determining whether or not information applied to the first and second bit lines and information applied to the first and second storage nodes match with each other. In the nonvolatile CAM, writing and reading by a DRAM operation become possible by using the memory capacitor in each of the memory cells. In addition, in the nonvolatile CAM, nonvolatile writing and reading by an EEPROM operation become possible by using the first and second memory transistors in each of the memory cells. Furthermore, information stored in the memory capacitor or the first and second memory transistors in each of the memory cells can be searched by applying search information to the corresponding fi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.