Deposition apparatus and method for enhancing step coverage and planarization on semiconductor wafers
US5114556A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 1989 |
| Grant date | May 19, 1992 |
| Priority date | — |
| Expiry date | Dec 27, 2009 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A layer of a substance such as a metal, non-metal or metal alloy is deposited, preferably by sputtering, onto the surface of a substrate such as a semiconductor wafer. The adatoms of the deposited layer are mobilized by being bombarded with a flux of low energy neutral atoms or molecules at an oblique angle of incidence to enhance step coverage and/or planarization of the semiconductor wafer. The neutral atoms or molecules are formed within the plasma by applying a negative bias potential to a reflector electrode which will attract positive ions from the plasma. The neutral atoms or molecules elastically scatter from the surface of the electrode to bombard the adatoms being deposited during the operation of the sputter source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.