System using microprocessor address lines for coprocessor selection within a multi-coprocessor apparatus
US5125095A · kind A · utility
18Cited by
4References
13Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Mar 28, 1991 |
| Grant date | Jun 23, 1992 |
| Priority date | — |
| Expiry date | Mar 28, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microcomputer system has a microprocessor and a number of independent coprocessors for executing individual instructions according to instruction data sent from the microprocessor. An address bus and a data bus interconnect the coprocessors with the microprocessor. The microprocessor sends instruction data to the coprocessors via the data bus and concurrently sends coprocessor designation data to the coprocessors via the address bus. The coprocessor designated by the designation data reads and reacts to the instruction data while the other coprocessors within the system disregard the instruction data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.