Wafer scale integration device
US5126828A · kind A · utility
5Cited by
8References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 1990 |
| Grant date | Jun 30, 1992 |
| Priority date | — |
| Expiry date | Mar 29, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15312
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A WSI device comprises a semiconductor substrate having a wafer scale size. An integrated circuit having a unified function is formed on a main surface of the semiconductor substrate. The semiconductor substrate defines various cutouts centrally and/or peripherally thereof. The cutouts serve to extend peripheral regions of the semiconductor substrate. Bonding pads are formed along the extended peripheral regions of the semiconductor substrate. As a result, the number of bonding pads that can be formed is increased to promote multi-functioning of the WSI device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.