Divided word line type non-volatile semiconductor memory device
US5132928A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 1990 |
| Grant date | Jul 21, 1992 |
| Priority date | — |
| Expiry date | Mar 30, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically programmable non-volatile semiconductor memory device includes a plurality of internal data transmission lines. Data communication between memory cells and the internal data transmission lines is performed for a byte of data having a plurality of bits. Each of the word lines includes a plurality of divided auxiliary word lines in association with the internal data transmission lines. Those memory cells for each word line that are to be connected to the same internal data transmission line are connected to one auxiliary word line. Only one of a plurality of memory cells connected to one auxiliary word line is connected to an internal data transmission line in operation. Therefore, a plurality of the memory cells connected to different auxiliary word lines, are connected in parallel to a plurality of the internal data transmission lines. According to this arrangement, the effect of word line destruction occasionally caused in one auxiliary word line is not extended to other auxiliary word lines, so that the damaged auxiliary word line can be repaired by the use of an error correction detection code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.