Stress relief layer providing high thermal conduction for a semiconductor device
US5134463A · kind A · utility
22Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 11, 1990 |
| Grant date | Jul 28, 1992 |
| Priority date | — |
| Expiry date | Oct 11, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip (27) is soldered on an electrode plate (24) with a thermal relaxation plate (40) therebetween. The thermal relaxation plate has a frame member (41) made of covar or invar and a plate member (42) made of copper. The plate member is inserted into the window space defined in the frame member and is united with the frame member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.