Clock feeding circuit and clock wiring system
US5140184A · kind A · utility
31Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 20, 1990 |
| Grant date | Aug 18, 1992 |
| Priority date | — |
| Expiry date | Nov 20, 2010 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Dummy power source wirings connected to a power source wiring are arranged in empty regions among the signal wirings that cross the clock wirings, the dummy power source wirings being arranged over or under the clock wirings in a manner to cross the clock wirings. The dummy power source wirings are formed to equalize the capacitances of the wirings whose lengths should be equalized among, for example, the clock distributing circuits or among the clock drivers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.