Semiconductor integrated circuit device having improved stacked capacitor and manufacturing method therefor
US5146300A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 1992 |
| Grant date | Sep 8, 1992 |
| Priority date | — |
| Expiry date | Feb 10, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device including a semiconductor substrate having a main surface; a first conductive region formed on the main surface; a second conductive region formed on the main surface, spaced apart from the first conductive region and to be electrically connected to the first conductive region; and a capacitor having a storage node connecting the first and second conductive regions. The storage node serves to connect the first and second conductive regions and simultaneously stores charges. In other aspects of the invention, there are provided a memory cell having a structure described above, and a method of manufacturing the above-described semiconductor integrated circuit device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.