Integrated circuit electronic grid device and method
US5150019A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 1990 |
| Grant date | Sep 22, 1992 |
| Priority date | — |
| Expiry date | Oct 1, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J17/38
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit electronic grid device includes first and second metal layers wherein a layer of a dielectric medium is disposed between the metal layers. A third metal layer is disposed above the second metal layer and insulated from the second metal layer by another layer of a dielectric medium. The first and second metal layers are biased with respect to each other to cause a flow electrons from the first metal layer toward the second metal layer. The second metal layer is provided with a large plurality of holes adapted for permitting the flow of electrons to substantially pass therethrough and to travel toward the third metal layer. A fourth metal layer is disposed above the third metal layer to collect the electrons wherein the third metal layer is also provided with a large plurality of holes to permit the electrons to flow therethrough and continue toward the fourth metal layer. The third metal layer is coupled to a lead to permit it to serve as a control grid for modulating the flow of electrons.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.