High-rate pulse pattern generator
US5150390A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 1991 |
| Grant date | Sep 22, 1992 |
| Priority date | — |
| Expiry date | Aug 20, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/025
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Frequency division circuits in n stages sequentially 1/2-frequency-divide an input clock signal. Pattern generating circuit generates and issues a plurality of pattern data parallel to each other in synchronism with a frequency-divided clock from the final frequency division stage thereof. Multiplexing circuits in n stages are given a plurality of pattern data and multiplex input pattern data in each stage for each two data. Output clock signals of the n-th through first stage frequency division circuits are supplied to the first through n-th multiplexing circuits via respective delay circuits as multiplexing control clock signals. A retiming circuit is inserted in series to the input of at least one of the multiplexing circuits, and a multiplexing control clock signal applied to said one multiplexing circuit from the corresponding frequency division circuit is given to the retiming circuit as a retiming clock signal. A phase switching circuit is inserted in series to the output of the frequency division circuit which applies the multiplexing control clock signal to said one multiplexing circuit. When a node of the input pattern data in the retiming circuit approaches the edge of a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.